0fd9eca07e
Meta-context [Recursive Parser Note]: This commit provides the full draft for the Systems & Hardware pillar of the PhD thesis. It formally exposes why synchronous CPU-side cryptographic hashing introduces a 30x PCIe starvation bottleneck, and why unfused secondary softmax injections shatter FlashAttention SRAM constraints. It details the v3 hardware solutions: Asynchronous Merkle Validation and the custom fused PagedFieldprintAttention Triton kernel.